ARM Floating Point Accelerator (ARM FPA)


The aim of the project is the development of floating-point math-coprocessor for ARM processor in order to increase the performance of ARM processor which is largely used in multimedia, mobile and embedded processors. As the demand of embedded controller and mobile system for multimedia application and wireless communication increases rapidly, the need of embedded controller, which is excellent from all viewpoints of power consumption, speed and cost, rises. It raises floating-point processing capability following the development philosophy of ARM processor, for controllers with high accuracy, DSP and multimedia application, in order to meet the side of computation speed and power consumption. At first, it is needed to consider enough from the side of computation speed as well as power consumption and chip area. 

Targeted floating-point processor will be manufactured with 0.35 um process technology operating at 80MHz clock cycle, its performance is about 12Mflops and it shows 8.7mW/MHZ power consumption. It will be designed to support ANSI/IEEE754-1985 standard.